SEMATECH Dictionary of Semiconductor Terms
A-Am | An-Az | B | C-Ch | Ci-Com | Con-Cz | D-De | Df-Dz | E-En | Eo-Ez | F-Fl
Fm-Fz | G | H | I | J-K | L | M-Mes | Met-Mz | N | O | P-Ph | Pi-Pq | Pr-Pz | Q | R
S-Se | Sh-So | Sp-Sta | Ste-Sz | T-Th | Ti-Tz | U-V | W-Z
"C-Ch"
C++ n |
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An object-oriented programming language developed at AT&T Bell Laboratories during the early 1980s. C++ is a "hybrid" language in which object-oriented features have been grafted onto an existing language (C). [SEMATECH] |
| calcium scaling n |
the deposition from water of calcium on a metal surface such as a cooling tube or boiler. [SEMATECH] |
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| calendar cycle time n |
the time (averaged over a number of lots) required to process from start to finish (through probe sort); includes weekends and other nonscheduled time. [SEMATECH] |
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| calibration gas n |
in mass flow devices, the gas that is flowed while the device is being calibrated. [SEMI E29-93] |
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| calibration size n |
the median size within the monodispersed size distribution that is produced for a deposit of polystyrene latex spheres on a calibration wafer. [SEMATECH] u |
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| calibration temperature n |
in mass flow devices, the ambient temperature at which a device was calibrated. [SEMI E18-91] Contrast with gas temperature and standard temperature. |
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| calichified adj |
permeated with calcium carbonate. [SEMATECH] |
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| calorie (cal) n |
a standard unit of heat equal to the amount of heat required to raise one gram of water one degree Celsius. [SEMATECH] |
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| calorimeter n |
an instrument capable of making absolute measurements of energy deposition (or absorbed dose) in a material through measurement of its change in temperature and a knowledge of the characteristics of its material construction. [ASTM E170-92] |
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| calorimetry n |
see differential scanning calorimetry. |
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| CAM system n |
a large body of software and hardware systems responsible for the overall operation of a factory; for example, WorkStream. (WorkStream is a registered trademark of Consilium, Inc.) [SEMATECH] Also see computer-aided manufacturing (CAM). |
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| camber n |
1 : edgewise curvature of a leadframe strip edge in the major plane of the leadframe strip. [SEMI G58-94] 2 : arching, out of the major plane, of a nominally flat ceramic body. [SEMATECH] Also see flatness. |
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| cantilever n |
a small, sharp measuring stylus capable of measuring forces on a nanonewton scale (for example, spring constant < 20 nN). [SEMATECH] |
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| cantilever probes n |
electrical probes for making contact to bare chips that are constructed with the contact pad at the end of a flexible beam. [1994 National Technology Roadmap for Semiconductors] |
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| cap n |
of a ceramic semiconductor package, the top portion, or lid. The cap is attached to the base . [SEMATECH] |
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| capability n |
1 : in communication and control of semiconductor manufacturing equipment, an operation performed by semiconductor manufacturing equipment. This operation is initiated through the communications interface using sequences of SECS-II messages (or scenarios). An example of a capability is the setting and clearing of alarms. [SEMI E30-94] 2 : in statistical process control, see process capability. |
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| capability index n |
a measure of the relationship between the specification limits and the process capability. [EIA 557] Also see process capability index. |
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| capability maturity model (CMM) n |
a software process improvement model developed by the Software Engineering Institute of Carnegie Mellon University to assist in evaluating software development maintenance capabilities. [SEMATECH] |
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| capacitance-to-voltage (CV) plotter n |
an electronic test system used to measure capacitance as a function of voltage between a conductive field plate insulated from a silicon wafer by a dielectric; for example, aluminum or doped silicon insulated from the wafer by silicon dioxide. [SEMATECH] |
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| capacitive load n |
a load in which the capacitive reactance exceeds the inductive reactance; the load draws a leading current. [SEMATECH] |
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| cap deposition |
see passivation. |
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| capture v |
in equipment exhaust systems, to entrain undesirable elements, such as gases, fumes, vapors, and particles, in the exhaust stream for removal. [SEMI S6-93] |
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| carbon dioxide (CO2) n |
a dense, colorless gas produced by the combustion and decomposition of organic substances and as a byproduct of many chemical processes. [SEMATECH] |
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| carbon monoxide (CO) n |
a colorless, odorless, flammable, and very toxic gas produced by the incomplete combustion of carbon compounds. It is a byproduct of many chemical processes. An asphyxiant, carbon monoxide reduces the ability of blood to carry oxygen. [SEMATECH] |
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| carbon tetrafluoride (CF4) n |
an inert, colorless, and nonflammable gas used in semiconductor processing as an etchant for a variety of films such as silicon, silicon oxide, and silicon nitride. It also is used in resist stripping and as a source of fluoride ions in plasma processes. This gas is a simple asphyxiant (can cause loss of consciousness because of lack of oxygen in the blood). [SEMI C3.40-89] Also called tetrafluoromethane. |
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| carcinogen n |
a chemical that (a) has been evaluated by the International Agency for Research on Cancer (IARC) and found to be a carcinogen or potential carcinogen; (b) is listed as a carcinogen or potential carcinogen in the Annual Report on Carcinogens published by the National Toxicology Program (NTP); or (c) is regulated by the Occupational Health and Safety Administration (OSHA) as a carcinogen. [SEMI S4-92] |
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| carrier n |
1 : an entity capable of carrying electric charge through a solid; for example, mobile holes and condition electrons in semiconductors. [SEMI M1-94 and ASTM F1241] Also called charge carrier. Also see majority carrier and minority carrier. 2 : slang for wafer carrier. [SEMATECH] |
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| carrier area n |
in 200 mm quartz and high-temperature wafer carriers, the area that includes the angle (in degrees) from the intersection of the horizontal center line of the wafers to the top side members on the right side and on the left side. [SEMI E2.2-88] |
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| carrier capacity n |
the number of wafers a wafer carrier can hold. [SEMATECH] |
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| carrier concentration n |
the number of majority carriers per unit volume, expressed in dimensionless units such as percentage, parts per million, or parts per billion. [SEMATECH] Also see carrier density. |
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| carrier density n |
in an extrinsic semiconductor, the number of majority carriers per unit volume, usually given in number/cm3, although the SI unit is number/m3. [ASTM F1241] Also see carrier concentration. |
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| cascade rinse n |
a deionized water rinse system in which water flows over the top of a tank. [SEMATECH] |
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| case temperature n |
in the measurement of thermal resistance, the temperature at a specified, accessible reference point on the package in which a semiconductor die is mounted. [SEMI G43-87] |
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| CASE tools n |
computer-aided software engineering (CASE) programs used to understand, simplify, and automate the development methods used throughout the software life cycle, to eliminate data redundancy or conflict, improve productivity and reliability, and to capture reusable functionality in terms of design and code. [SEMATECH] |
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| cassette n |
an open structure that holds one or more substrates. [SEMI E44-95] |
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| cassette centroid n |
the theoretical center of a stack of wafers in a cassette formed by the pocket center line and the "center" pocket. [SEMI E15-91] |
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| cassette envelope n |
a rectangular box with vertical sides that completely contains a cassette, even if the cassette is tilted. [SEMI E15-91] |
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| cassette module n |
in modular equipment, a two-port module in which one port accepts or presents a wafer carrier of wafers (or possibly, in an automated factory, an individual wafer) for intertool transport, and the second port accepts or presents a single wafer within the module for intratool transport. [Adapted from SEMI E21-94] |
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| cassette stage n |
in a cassette transfer, a stage on a piece of equipment on which a cassette is placed or from which it is removed, allowing the transfer of the cassette. [SEMI E23-91] |
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| cassette transfer robot n ] |
in a cassette transfer, a robot that transfers cassettes. [SEMI E23-91 |
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| castellation n |
on a ceramic chip carrier, that series of ribs and metallized indentations that defines edge-contact regions. [SEMI G5-87] |
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| cataract n |
an abnormal progressive condition of the lens of the eye characterized by loss of transparency. [SEMATECH] |
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| cation n |
an ion that has a positive charge. [SEMATECH] |
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| cation-exchange resin n |
an ion-exchange resin capable of the reversible exchange of positively charged ions. [SEMATECH] |
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| cause-and-effect diagram n |
a tool for individual or group problem-solving that uses a graphic description of the various process elements to analyze potential sources of process variation. [EIA 557] |
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| caustic adj |
describes a substance capable of destroying or eroding by chemical action. [SEMATECH] |
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| cavity n |
1 : in a cofired ceramic semiconductor package, the area that is designated for die attach. The nominal area is defined by the limits of the bond finger ledge (or wire bond cavity). [SEMATECH] Also see effective die attach area. 2 : the overall area for wire bonds in a cofired ceramic package. [SEMATECH] 3 : in a mold for plastic packages, the areas of the mold that become filled with plastic during the molding cycle, encapsulate the die, and form the body of the device. A mold has matching upper and lower cavities, and the term cavity is also used to describe the top or bottom of a finished plastic package. [SEMATECH] 4 : a vacancy or empty space in a wafer. A cavity usually is left by dissolved precipitates or gallium inclusions or by arsenic dissociation, or it may be created by excessive vapor pressure. [SEMI M10-89] 5 : in pellicle technology, an unfilled space between the photomask and the optically transparent film within the mounted pellicle frame area. [SEMI P5-86] |
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| cavity-down packages n |
in cofired ceramic packages, packages on which the die surface faces the mounting board. [SEMI G61-94] |
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| cavity-to-frame offset |
see offset. |
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| cavity length n |
in a semiconductor package, the length of the leadframe area that will contain the die. The cavity is measured from the ends of the lead tips. [SEMATECH] |
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| cavity-up packages n |
in cofired ceramic packages, packages on which the die surface faces away from the mounting board. [SEMI G61-94] |
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| cavity width n |
in a semiconductor package, the width of the leadframe area that will contain the die. The cavity is measured from the ends of the lead tips. [SEMATECH] Also see leadframe. |
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| C-chart n |
an attributes chart used to track the number of nonconformities with a constant sample size. For example, a C-chart can be used to track the total number of particles per wafer, assuming the underlying particle distribution is a Poisson distribution. [SEMATECH] |
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| CD |
see critical dimension. |
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| ceiling n |
in safety threshold limit values, the concentration that should not be exceeded during any part of the working exposure. [SEMI S2-93] |
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| cell n |
1 : a group of resources treated as a single entity that accepts a combination of materials and instructions to add value through a series of operations; may be either automated or manual. [SEMATECH] 2 : in circuit design, a circuit required to implement a repeated function on an integrated circuit, such as a bit in a memory chip. [SEMATECH] 3 : in the dot matrix code marking of silicon wafers, the area of a dot matrix within which a dot may be placed to indicate a binary value. [SEMI T2-93] |
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| cell center point n |
in the dot matrix code marking of silicon wafers, the point in an array at which the center line of a row intersects the center line of a column. [SEMI T2-93] |
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| cell controller n |
a computer system that supports the people in a cell or bay by partially or fully automating scheduling, material movement, information collection and update, recipe management, and process control. [SEMATECH] |
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| cell spacing n |
in the dot matrix code marking of silicon wafers, the (equal) vertical or horizontal distance between the cell center points of contiguous cells in a square array. [SEMI T2-93] |
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| cell structure n |
on a semiconductor wafer or substrate, malformations attributable to crystal nonhomogeneities that have their origins in the crystal growth process. [SEMI M10-89 and ASTM F1241] Also called block structure. |
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| center-to-center |
see pitch. |
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| central area n |
in the dot matrix code marking of silicon wafers, the area of a cell enclosed by a circle centered at the cell center point. The central area is used by code readers to sense the binary value of the cell. [SEMI T2-93] |
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| central line n |
on a control chart, the line that represents the average or median value of the items being plotted. [EIA 557] |
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| central nervous system effects n |
physical symptoms such as headache, tremors, drowsiness, convulsions, hypnosis, anesthesia, nervousness, irritability, narcosis, dizziness, fatigue, lethargy, peripheral memopathy, memory loss, impaired concentration, restlessness, and sleep disturbance. [SEMATECH] |
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| centrality n |
the placement of an array with the center functional pattern of the array positioned from and referenced to the edge of the photoplate to a specified tolerance. [ASTM F127-84] |
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| central utility building (CUB) n ] |
a remote structure housing all chillers, boilers, pumps, air compressors, vacuum systems, and the central facility control center. [SEMATECH] |
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| center line n |
in the dot matrix code marking of silicon wafers, the line positioned parallel to, and spaced equally between, the boundary lines of a row or column. [SEMI T2-93] |
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| ceramic (cer) n |
a high-temperature material used in forming substrates for packaging integrated circuits. This material is inorganic, nonmetallic, and crystalline. Examples are alumina and beryllia. [SEMATECH] |
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| ceramic chip carrier (CCC) n |
a small-footprint, cofired ceramic package, usually with terminals on all four sides. Ceramic chip carriers may be leaded or leadless. [SEMI G5-87] Also see chip carrier. |
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| cerdip |
abbreviation for ceramic dual inline package. |
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| cerpack |
abbreviation for ceramic package. |
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| CGA connection cap or plug n |
a cap or plug fitting over or into, respectively, the threads of a Compressed Gas Association (CGA) connection to seal the connection from leakage and contamination in or out. [SEMI International Standards 1990, Vol. 1, Glossary] |
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| change order n |
a formal change in drawings and specifications. [SEMATECH] Also called engineering change order. |
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| channel |
see bin. |
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| character n |
1 : a symbol, letter, digit, or mark used to represent, control, or organize information. [SEMATECH] 2 : a byte sent on a SECS-I serial line. NOTE-Data is transmitted or received in a serial bit stream of 10 bits per character at one of the specified data rates. The standard character has one start bit (0), eight data bits, and one stop bit (1). [SEMI E4-91] |
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| character code |
see code element set. |
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| characterization n |
the use of mathematical modeling, design of experiments, or statistical data evaluation to describe the characteristics of a process, environment, or product. [EIA 557] |
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| characterize v |
to describe the quality of. [SEMI F7-92] |
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| character misalignment |
see adjacent character misalignments. |
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| character separation n |
in the serial alphanumeric marking of silicon wafers, the horizontal distance between the adjacent boundaries of any characters. [SEMI M13-88] |
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| character set n |
1 : a finite collection of letters, digits, and other symbols defined for a specific application, such as a programming language, a printer, or an optical scanner. [SEMATECH] 2 : in the bar code marking of silicon wafers, the complete range of characters available for encoding in a particular bar code symbology. [SEMI T1-93] |
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| character spacing n |
in the serial alphanumeric marking of silicon wafers, the horizontal distance between the character center lines of adjacent characters. [SEMI M13-92] |
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| character window n |
in the serial alphanumeric marking of silicon wafers, the rectangular area within which all characters must be contained. [SEMI M12-89] |
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| charge carrier |
see carrier. |
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| chase n |
a support equipment area between bays in a wafer fabrication facility in which the chemicals, power, air, and other facility items that support the operation of the bays are placed. The chase usually is not as clean as the bays. [SEMATECH] |
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| check character n |
in the bar code marking of silicon wafers, a character included within a symbol, the value of which is used to perform a mathematical check to ensure the accuracy of the read. [SEMI T1-93] |
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| checksum n |
in message transfer, a 16-bit number used by the receiver to detect transmission errors. NOTE-A checksum is calculated as the numeric sum of the unsigned binary values of all the bytes after the length byte and before the checksum in a single block. [SEMI E4-91] |
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| check valve n |
a flow-controlling device, installed in a tube or pipeline, that allows flow to occur in only one direction and positively prevents flow in the opposite direction. [SEMI International Standards 1990, Vol. 1, Glossary] |
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| chemical amplification n |
used in photolithography to describe a process in which process exposure sensitivity of a photoresist is enhanced through secondary chemical reactions that are triggered by a primary photochemical reaction. [1994 National Technology Roadmap for Semiconductors] Also see chemically amplified resist. |
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| chemical etch n |
the dissolution of the material of a surface by subjection to the corrosive action of a liquid or gaseous acid or an alkali. [ASTM F127-84] |
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| chemically amplified resist n |
a type of photoresist, typically used in deep ultraviolet (DUV) lithography, that relies on the catalytic action of a photogenerated acid during the post-exposure bake (PEB) process to alter the solubility of the exposed film. Since the acid catalyst is not consumed during PEB reaction, it can participate in multiple reaction cycles, thus providing an amplification mechanism. [SEMATECH] Also see chemical amplification. |
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| chemical-mechanical polish (CMP) n |
a process for the removal of surface material from a wafer. The process uses chemical and mechanical actions to achieve a mirror-like surface for subsequent processing. [SEMI M1-94 and ASTM F1241] Also called chem-mech polish. |
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| chemical milling n |
the gross removal of material from a body by the corrosive action of an acid or an alkali that results in a substantial change of shape of the body. [ASTM F127-84] |
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| chemical reversal n |
a develop operation on a resist image that reverses the polarity of the image. [Adapted from ASTM F127-84] |
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| chemical vapor deposition (CVD) n |
in semiconductor technology, a process in which a controlled chemical reaction produces a thin surface film. [SEMI M1-94 and ASTM F1241] Contrast physical vapor deposition. |
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| chemiluminescence n |
emission of light during a noncombustible chemical reaction. [SEMATECH] |
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| chem-mech polish |
See chemical-mechanical polish. |
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| child n |
in object-oriented programming, a level within the model hierarchy descended from the preceding parent level. [SEMATECH] Also see inheritance. |
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| chill plate n |
a process module used to cool wafers after a bake process. [SEMATECH] |
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| chip n |
1 : in semiconductor wafers, a region where material has been unintentionally removed from the surface or edge of the wafer. [ASTM F1241] Contrast indent. 2 : see die. 3 : in packaging, a region of material missing from a component; for example, ceramic from a package or solder from a preform. The region does not progress completely through the component and is formed after the component is manufactured. The chip size is given by its length, width, and depth from a projection of the design plan-form. [SEMI G61-94] Also called chip-out. Contrast pit. 4 : in flat panel display substrates, a region of material missing from the edge of the glass substrate, which is sometimes caused by breakage or handling. [SEMI D9-94] |
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| chip carrier (CC) n |
a small footprint semiconductor package generally with terminals on all four sides. The package may be manufactured by cofired ceramic or multilayer printed circuit board technologies. [SEMATECH] Also see castellation and ceramic chip carrier. |
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| chip-out |
see chip. |
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| chip-on-board (COB) n |
a configuration in which a die is placed directly onto a substrate. Approaches include wire bonding, tape automated bonding, and solder interconnections. [SEMATECH] |
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| chlorine (Cl) n |
an element; gaseous chlorine (Cl2) is greenish-yellow, approximately 2.5 times as heavy as air, and has a disagreeable and suffocating odor. Chlorine is used as a gas etchant for semiconductor materials, specifically for aluminum etching, especially in conjunction with boron trichloride. [SEMI C3.32-87] |
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| chromatography n |
1 : a method of separating and analyzing mixtures of chemicals. [SEMATECH] 2 : the separation, especially of closely related compounds, by allowing a solution or mixture to seep through an adsorbent (such as clay, gel, or paper) so each compound becomes adsorbed into a separate, often colored, layer. [ASTM E375] |
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| chuck mark n |
any physical mark on either surface of a wafer caused by a robot end effector, a chuck, or a wand. [ASTM F1241] |
A-Am | An-Az | B | C-Ch | Ci-Com | Con-Cz | D-De | Df-Dz | E-En | Eo-Ez | F-Fl
Fm-Fz | G | H | I | J-K | L | M-Mes | Met-Mz | N | O | P-Ph | Pi-Pq | Pr-Pz | Q | R
S-Se | Sh-So | Sp-Sta | Ste-Sz | T-Th | Ti-Tz | U-V | W-Z
