Lithography
As a semiconductor industry leader, SEMATECH embraces its responsibility to extend existing lithography technologies for as long as possible, while developing next-generation solutions and investigating alternative approaches.
We also stress continued improvement and evolution in lithography infrastructure. This focus is grounded in real-world manufacturing feasibility and cost of ownership (COO)—a characteristic of all SEMATECH programs.
Additionally, SEMATECH continues to sponsor and organize international symposia that bring the world’s leading lithographers together to improve fundamental understanding of both the needs and the challenges facing the semiconductor manufacturing industry.
EUVL Mask Infrastructure Partnership
SEMATECH recently launched a new global consortium, the EUVL Mask Infrastructure Partnership, to develop critical metrology tools for detecting defects in advanced EUVL masks, filling an industry need deemed too costly for individual companies to develop independently.
Extreme Ultraviolet Lithography
Extreme ultraviolet lithography (EUVL) is an advanced form of lithography that uses extremely short wavelength (13.5 nm) light, mirrors and reflective photomasks to image circuit patterns onto the surface of semiconductor wafers. 
The microchips that will be produced with EUV technology will contain features 32 nm wide or smaller, and are projected to be as much as 100 times faster, with 1,000 times the memory capacity of today's most powerful computer chips.
SEMATECH’s vision is to deliver key capability that will enable EUV mask blanks with linewidths of 22 nm and below, while providing imaging capability to test resists at the same dimensions; and to drive defect-free reticle carriers to commercialization. The program has been closing on these goals with achievements that include:
- An order of magnitude reduction in mask defects (from 1000 to 10 and below) at the EUV Mask Blank Development Center in Albany, NY
- Demonstration of 32 nm linewidths in EUV resists using the MET tool at Lawrence Livermore National Laboratory in Berkeley, CA
Resist Materials and Development Center
SEMATECH’s Resist Materials and Development Center (RMDC) works to develop resist and materials for 22 nm patterning technologies and beyond. EUV micro-exposure tools at the University at Albany’s College of Nanoscale Science and Engineering (CNSE), and at the University of California, Berkeley, have enabled resist resolution down to the 22 nm line width. Other RMDC projects have succeeded in measuring outgassing in nearly 100 EUV resists, and have delivered more than 150 exposure shifts to member companies.
Mask Program
A mask is a microscopically detailed, stencil-like device that is used with light or radiation to transfer microscopic circuit patterns onto the surface of a wafer. Masks are integral to the chip production process and can be very costly to make, especially as chip features shrink to just tens of nanometers.
The mission of this program is to provide SEMATECH’s member companies and the industry with the capability to build infrastructure to keep masks cost-effective current and future lithography technologies, as well as provide key mask tools needed to enable future technologies.
SEMATECH plays a unique role in supporting mask infrastructure development, spearheaded by its EUV Mask Blank Development Center, the world’s sole research facility devoted to improving mask blanks. SEMATECH has led industry advances in particle-free EUV mask handling and actinic mask defect inspection.
In February 2009, SEMATECH entered into a joint development partnership with Asahi Glass Co. to accelerate mask blank commercialization. Asahi, a dominant mask blank supplier in Japan, will collaborate with SEMATECH at CNSE on ways to improve EUV mask blank yield for commercial manufacturing.
Alternative Lithography
Like an evolving species, lithography has morphed through many technologies over the past 40 years, often defying the predictions of leading scientists. Mindful of this history, SEMATECH continues to look beyond conventional approaches to include alternative technologies such as nanoimprint lithography.
Analogous to a rubber stamp, nanoimprint lithography uses a nanoscale mold to form circuit patterns. Although process is demanding because of the extremely small geometries involved, nanoimprint offers the potential to make chips without masks.
SEMATECH is currently working to demonstrate whether nanoimprint to can achieve quality litho imaging and deliver an assessment of maskless lithography for possible insertion into the International Technology Roadmap for Semiconductors.
